Embedding Compute Within Memory Stacks
At Hot Chips 2026, Samsung announced a three‑phase roadmap that will embed processing power directly into high‑bandwidth memory, moving from traditional stacked DRAM to a unified memory‑compute architecture. The plan spans 2026 to 2028 and includes intermediate steps before reaching the final zHBM design.
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Apple’s New CEO Renames Lake Ontario To Lake America In Maps AppThe architecture stacks a logic die directly under the DRAM chips, eliminating the traditional 2.5D interposer that linked memory and processor. By doing so, Samsung claims a 30% reduction in latency and a 20% boost in energy efficiency for compute‑intensive tasks. The new stack also supports standard memory interfaces, ensuring compatibility with existing software stacks.
If logic lives inside memory, AI models can run faster with less data movement. This could lower training costs and enable real‑time inference on edge devices. The shift may also pressure competitors to redesign their memory strategies. Industry analysts see this as a step toward truly in‑memory computing, where data processing happens where the data resides.
Will This Redefine AI Acceleration?
Samsung said the first phase integrates a modest compute chip beneath the DRAM stack, using existing HBM2e modules. The second phase adds a larger logic die, still separated by a thin interposer. The final phase, zHBM, removes the interposer entirely, placing the processor directly under the memory layers. This approach shortens data paths, reduces latency, and cuts power consumption for AI workloads. Samsung also highlighted that the roadmap aligns with the industry's push for higher bandwidth and lower power in data centers. The company projects that zHBM could deliver up to 5× the bandwidth of current HBM2e solutions.
Samsung expects the zHBM rollout to begin in 2027, with volume production targeted for 2028. If successful, the technology could become a baseline for next‑generation GPUs and AI accelerators, reshaping the semiconductor market. If the technology matures as planned, it may enable new AI models that were previously limited by memory bandwidth.
Frequently Asked Questions
When will Samsung start shipping zHBM products? The first samples are expected in late 2026, with mass production planned for 2028. Early adopters in the AI accelerator market will receive the chips then.
How does zHBM differ from conventional HBM? zHBM places the processor directly beneath the DRAM stack, removing the interposer used in traditional HBM. This integration shortens the electrical path and reduces latency compared to stacked memory alone.
Will zHBM make manufacturing more difficult? The approach adds a logic die to the stack, which can increase yield challenges. However, Samsung says its process flows are compatible with existing fabs, limiting major disruptions.
